104 high street, west wickham, london. br4. 0nf. england. 05/08/2005 ph: +44 208 325 1062, fax: +44 208 181 6751 page 1 of 4 www.fiduciauk.com sales@fiduciauk.com product specification monochrome lcd module part number : fgd192032b description : 32x192graphic revision : rev a approval for specification only approval for sample only approval for mass pr oduction approval for pre-production x
fgd192032b ( 192 dots x 32 dots ) features mechanical data built-in controller (sed1520 or equivalent) item dimensions unit +5 v power supply module size (w x h x t) 116.0 x 37.0 x 9.4 ( 10.8 led ) mm 1/32 duty cycle viewing area ( w x h ) 88.0 x 19.0 mm 8-bit parallel interface active area ( w x h ) 80.6 x 16.28 mm 4.2 v led forward voltage dot size ( w x h ) 0.38 x 0.47 mm dot pitch ( w x h ) 0.42 x 0.51 mm interface pin connections absolute maximum ratings no. symbol level function item symbol min. typ. max. unit 1v ss 0v power supply ground supply voltage for logic v dd -v ss 0 - 7 v 2v dd 5v power supply voltage supply voltage for lcd drive v dd -v o 0 - 12 v 3v o - contrast adjustment voltage input voltage v i vss - v dd v 4 ao h/l data type select signal 5 r/w h/l h : read / l : wrtie electrical characteristics 6 e h l enable signal item symbol condition min. typ. max. unit 7~14 db0~db7 h/l data bus line supply voltage for logic v dd -v ss - 4.5 5 5.5 v 15 a 4.2v led power (+) supply voltage for lcd v dd -v o v dd =5v ta=25 4.4 4.8 5.2 v 16 k 0v led power (-) supply current i dd v dd =5v - 3 4.5 ma 17 cs1 h chip select signal for ic1 input "high" level v ih - 2.2 - vdd v 18 cs2 h chip select signal for ic2 voltage "low" level v il - - - 0.6 v 19 cs3 h chip select signal for ic3 output "high" level v oh - 2.4 - - v 20 cl h/l clock input (2 kh z ) voltage "low" level v ol - - - 0.4 v external dimensions
fgd192032b ( 192 dots x 32 dots ) timing characteristics timing characteristics timing characteristics timing characteristics item symbol min. typ. max. unit. system cycle time t cyc6 1000 - - ns address set-up time t aw6 20 - - ns address hold time t ah6 10 - - ns data set-up time t ds6 80 - - ns data hold time t dh6 10 - - ns output disable time t oh6 10 - 60 ns access time t acc6 --90ns enable pulse width read 100 - - ns write 80 - - ns block diagram block diagram block diagram block diagram t ew
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